CEVA, the world's leading signal processing IP licensing provider focused on higher smart connected devices, announces the CEVA-X2 DSP, a small and efficient processor for LTE-Advanced Pro and 5G smartphones, designed for multi-carrier, multi-standard modem designs Developed with great complexity in PHY control.
The CEVA-X2 combines powerful DSP performance with efficient control features such as reduced code length and number of cycles, and advanced system control features including multi-processor support with features such as cache coherency and automated hardware acceleration management. . The focus of the DSP is on advanced modem workloads for PHY control processing, such as PHY Datapath tasks that do not require operation on the DSP, such as per-channel measurement and decoding. The CEVA-X2 provides 30% to 65% higher chips than the CEVA-X4 DSP. Improved dimensional efficiency and 10% to 25% power efficiency improvement. The CEVA-X2 is also suitable for running PHY and MAC simultaneously for a range of other communication standards such as IEEE 802.15.4g, ZigBee, Thread and Power Line Communication (PLC), combining superior power efficiency with minimum chip area to meet the requirements of such use cases.
Michael Boukaya, vice president and general manager of CEVA's wireless business unit, commented: "The new CEVA-X architecture framework addresses the 'design gap' of DSPs for companies developing next-generation modems, including products targeting LTE-Advanced Pro and 5G. Many existing DSP architectures do not have sufficient performance to efficiently handle these advanced use cases, but the CEVA-X2 brings a number of powerful features to address the key challenges of multiple RAT PHY control processing, even for the most complex use cases. Ensure outstanding performance and efficiency."
The CEVA-X2 features a 64-bit SIMD data path, supports five VLIW instructions, and a ten-level pipeline, and supports both fixed- and floating-point operations. The DSP is equipped with high-end features comparable to the best-in-class controllers, including a dedicated 32-bit zero-delay instruction set architecture (ISA), 32-bit hardware division and multiplication, dynamic branch prediction, and ultra-fast correlation switching. To learn more about CEVA-X2, please visit the company website.
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Zhejiang Casnovo Materials Co., Ltd. , https://www.casnovonewenergy.com