ADLINK, a specialist in modular embedded computing platforms, officially announced its support for the second edition of the PICMG ® COM Express® Carrier Board Design Guide on February 20. This design guide has been updated by a dedicated PICMG® subcommittee to reflect the latest signals used in the PICMG® COM.0 R2.1 specification, including the latest high-speed interface design rules and guidance, such as the third-generation PCI-Express. SuperSpeed ​​USB, SATA 6Gb/s and Digital Display Interface (DDI) reference schematics to support HMDI, DVI and DisplayPort outputs.
Jeff Munch, the CTO of ADLINK and the chairman of the PICMG ® Subcommittee, stated: "To ensure that the design rules can be applied to the carrier board, it takes a lot of time and effort to simulate these latest high-speed signals. The release of the final version is driving the progress of this process."
The second edition of the PICMG ® COM Express® Carrier Board Design Guide provides information on designing a customizable, system-based carrier board based on COM Express® modules. This guide includes the reference schematics required for external circuitry to implement various COM Express® peripheral functions and how to extend the supported bus and how to add peripherals to a COM Express®-based system and Expansion slot.
“In an open specification, continuous design is critical to achieving all functional design, especially when COM Express® is accepted by embedded vendors,†said Joe Pavlat, President and Chairman of the PICMG® Association. “We are very I am grateful to members like ADLINK for their active participation in the related issues and for the tremendous efforts made."
The second edition of the PICMG ® COM Express® Carrier Board Design Guide contains additional information for designing a customizable, system-based board based on COM Express® modules. This guide includes the reference schematics required for external circuitry to implement various peripheral functions of COM Express®.
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